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RF发生器频率范围:9kHz至6GHzRF发生器瞬时带宽:1GHzRF分析仪频率范围:9kHz至6GHzRF分析仪瞬时带宽:1GHz发生器调谐时间(典型):175us

PXIe-5641 双输入/双输出PXI IF收发仪|NI (在产)

IF输入:2通道

ADC :14 bits

Sample rate:30 MS/s 至 100 MS/s

IF输出:2通道

ADC :14 bits

Sample rate:30 MS/s 至 100 MS/s

参考价格 : RMB 132,905
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双输入/双输出PXI IF收发仪

PXIe‑5641是一款双输入双输出中频(IF)收发器,适用于射频识别(RFID)测试、频谱监测、实时频谱分析、RF动态测试和软件无线电(SDR)等应用。 该模块可以轻松处理复杂和高速的信号处理、分析和调制任务。

产品编号: 780710-01


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IF Input

Number of channels

2

ADC resolution

14 bits

Sample rate

30 MS/s to 100 MS/s

Full-scale input range

+8.5 dBm peak at 10 MHz ± 1 dB typical (1.7 Vpeak–peak sine, 0.60 VRMS)

Maximum input level without damage

+24 dBm peak (10Vpeak–peak sine, 3.5 VRMS)

Input coupling

AC

Input impedance

50 Ω nominal

Input return loss

<-15 dB typical, 250 kHz to 80 MHz

Maximum DC input voltage without damage

10 V

Average noise density

-143 dBm/Hz typical

Signal-to-noise ratio

>76 dB typical (-1 dBfs at 68 MHz tone, bandwidth = 10 MHz)

Maximum instantaneous bandwidth

20 MHz (limited by digital downconverter)

Passband flatness (referenced to 10 MHz) 250 kHz to 80 MHz

<+0.33 dB, -0.55 dB typical

AC coupling cutoff frequency (-3 dB)

50 kHz typical

Input group delay variation

10 ns peak-to-peak typical, 250 kHz to 80 MHz

Stopband rejection

>50 dB typical at 120 MHz, referenced to 10 MHz

Channel-to-channel crosstalk<40 MHz<-70 dB typical40 MHz to 80 MHz<-60 dB typical

IF Input Performance

Figure 1. Measured Input Frequency Response (Passband)

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Figure 2. Measured Input Frequency Response (Broadband)

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Figure 3. Measured Input Frequency Response (Low Frequency)

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Figure 4. Measured Phase Noise (Carrier Frequency = 62.922 MHz)

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IF Input Spectral Characteristics

Third-order intercept (TOI)

+38 dBm typical

IF Input Spectral Characteristics Performance

Figure 5. Measured Analog Input Two-Tone Intermodulation Distortion (IMD) (Center frequency at 70 MHz, Two Carriers at 70 MHz ± 0.5 MHz, 0 dBm each)

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Digital Downconverter Characteristics

Number of channels

Up to 6 per ADC channel

DDC resolution

16 bits for both I and Q data

Decimation[1]

÷4 to ÷4,096

Tuning resolution

ADC clock/232

Digital Downconverter (DDC) Performance

Figure 6. DDC Filter Performance, 20 MHz Span (Solid) and Aliasing After Decimation (Dashed)

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Figure 7. DDC Filter Performance, 10 MHz Span

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Sample DDC filter performance plots use NI-5640R 1.3 instrument driver library example filter designs. The dark lines in the above figures show the true response of the digital filter in the DDC. The dashed lines show the effect of aliasing after decimation. Notice that for a 10 MHz span, the DDC filter aliasing artifacts have virtually no impact; whereas for a full 20 MHz span, signals at frequency offsets near ±40 MHz can alias back up to -66 dBc within the ±10 MHz passband near the band edges.

IF Output

Number of channels

2

DAC resolution

14 bits

Sample rate

30 MS/s to 200 MS/s

Output coupling

AC-coupled

Output impedance

50 Ω nominal

Output return loss

<-15 dB typical, 250 kHz to 80 MHz

Maximum DC bias voltage without damage

10 V

Average noise density

-153 dBm/Hz typical

Signal-to-noise ratio+2 dBm output level>69 dB typical-4 dBm output level>64 dB typical
Full-scale output range[2]CIC and inverse sync ON-4 dBm peak at 10 MHz ± 1 dB typical (0.4 Vpeak-peaksine, 0.14 VRMS)Filters off, uncompensated+2 dBm peak at 10 MHz ± 1 dB typical (0.8 Vpeak-peaksine, 0.28 VRMS)

Output protection

Indefinite duration short to ground

Maximum reverse power without damage

+24 dBm peak (10 Vpeak-peak, 3.5 VRMS)

Passband flatness (referenced at 10 MHz)

<±1 dB typical, 250 kHz to 80 MHz (with CIC and sync compensation filter engaged)

AC coupling cutoff frequency (-3 dB)

50 kHz typical

Channel-to-channel crosstalk<40 MHz<-70 dB typical≥40 MHz to 80 MHz<-60 dB typical

IF Output Performance

Figure 8. Measured Analog Output Passband Flatness (Referenced to 10 MHz)

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IF Output Spectral Characteristics Performance

Figure 9. Measured Analog Output Single-Tone Distortion (Carrier Frequency = 7.36 MHz, Inverse Sync Filter OFF, Output Amplitude = -3 dBFS)

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Figure 10. Measured Analog Output Two-Tone IMD (Center Frequency at 70 MHz, Carriers at 70 MHz ± 0.5 MHz, -5 dBm Each, Inverse Sync Filter ON)

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Digital Upconverter Characteristics

Number of channels

1 per DAC channel

DUC resolution

14 bits for both I and Q data

Interpolation

4x to 252x

Modulation bandwidth

Up to 40 MHz

Tuning resolution

DAC clock/232. (For example, a 200 MHz clock results in a 46.6 mHz tuning resolution.)

System Level Performance

System Level Modulation Quality

Conditions

8-QAM, symbol rate: 3.125 MHz, PRN 9 sequence, power: -5 dBm, filter alpha 0.22, filter length 128, root-raised cosine

Modulation error ratio (MER)[3]10 MHz carrier>57 dB typical40 MHz carrier>54 dB typical70 MHz carrier>46 dB typical

Data Transfer Rate

(Using NI PXIe-1062Q chassis, NI PXIe-8130 controller, single-threaded, half-duplex transfer; transfer rate is dependent upon controller and chassis hardware, software, and backplane usage.)

NI PXIe-5641R to host

120 MB/s typical

Host to NI PXIe-5641R

52 MB/s typical

Timebase System

Internal Timebase

Timebase frequency[4]

200 MHz ± 35 ppm, maximum

Minimum Sample Clock divisor

2 for ADC, 1 for DAC

Supported divisors

1, 2, 4, 8, and 16

External Clock/External Frequency Reference

Impedance

50 Ω nominal, AC-coupled

Input amplitude rangeSine wave0.63 Vpeak-peak to 2.8 Vpeak-peak (0 dBm to 13 dBm)Square wave0.25 Vpeak-peak to 2.8 Vpeak-peak

Maximum input level without damage

+24 dBm (10 Vpeak-peak, 3.5 VRMS)

Maximum PLL lock time

250 ms

External Reference Clock range[5]

1 MHz to 100 MHz in 1 MHz increments, ±100 ppm

External Sample Clock range[6]

30 MHz to 200 MHz

Trigger System

Modes

Digital input, software

SourcesUsing instrument driverTRIG or softwareUsing LabVIEW FPGATRIG, RTSI <0..7> (mapped to PXIe_TRIG<0..7>), or software
SlopeUsing instrument driverRisingUsing LabVIEW FPGARising or falling

External Trigger Channel (TRIG)

Impedance

10 kΩ nominal, DC-coupled

Range

0 V to 3.3 V typical, 5 V tolerant

VIH

2.2 V typical

VIL

0.95 V typical

Overvoltage protection

-3.5 V to +8 V continuous

Maximum trigger frequency

<10 MHz typical, system dependent

Input rise/fall time

<10 ns/V typical

AUX I/O Connector

Number of digital lines

7

I/O direction

Pin-configurable

Input voltage range

0 V to 3.3 V typical, 5 V tolerant

VIH

2.5 V typical

VIL

1 V typical

VOH

3.5 V typical, no load

VOL

0.1 V typical, no load

Overvoltage protection

-0.5 to +5.5 V

Output type

3.3 V CMOS

Output current

±24 mA

Output impedance

56 Ω

+5 V power output voltage

5 V ± 10%

+5 V power output current

500 mA, ±150 mA typical, electronically fused

FPGA

Model

Xilinx Virtex 5 SX95T

Logic cells

94,208

Multipliers/DSP blocks (18 * 18)

640

Block RAM

8,784 (kbits max)

Onboard DRAM

Memory size

128 MB

Theoretical maximum data rate

1,600 MB/s

Maximum Power Requirements

+3.3 VDC

3 A

+12 VDC

3 A

Total power

38.25 W

Physical Characteristics

Dimensions

3U, one slot, PXI Express module 21.6 cm * 2.0 cm * 13.0 cm (8.5 in * 0.8 in * 5.1 in)

Weight

397 g (13.4 oz)

Table 1. I/O Connectors
Connector NameTypeFunction
AI CH <0..1>SMAAnalog input terminals for the NI PXIe-5641R
AO CH <0..1>SMAAnalog output terminals for the NI PXIe-5641R
CLK INSMBInput terminal for an external Reference Clock or Sample Clock
TRIGSMBInput or output terminal for device trigger signals
DIO (AUX I/O)9-pin DIN mini-circularInput or output terminal for device digital I/O (DIO) channels

Environment

Maximum altitude

2,000 m (800 mbar) (at 25 °C ambient temperature)

Pollution Degree

2

Indoor use only.

Operating Environment

Ambient temperature range

0 °C to 55 °C

Relative humidity range

10% to 90%, noncondensing

Storage Environment

Ambient temperature range

-40 °C to 71 °C

Relative humidity range

5% to 95%, noncondensing

Shock and Vibration

Operating shock

30 g peak, half-sine, 11 ms pulse

Random vibrationOperating5 Hz to 500 Hz, 0.3 grmsNonoperating5 Hz to 500 Hz, 2.4 grms


 

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